DigiView™ Logic Analyzer Overview

DigiView 9, 18 & 36 Channels

Fully implemented Features

Features Overview

 DigiView is a highly productive, thoroughly integrated tool. Each feature is deeply integrated and complete - not just marketing bullets.

You will find a lot more 'under the hood' than just 'advanced searches', 'powerful triggers' or 'Easy Navigation' buzz phrases.

DigiView Screen Shot
Much of the depth is difficult to see in marketing materials and only fully appreciated when you start using the system in real-world debug scenarios.

  • Easy configuration.
  • Easy Analysis.
  • Find what you are looking for.
  • Long capture times.
  • Automation.
  • Navigate your data with ease.
  • Built-in Decoding plus
    Custom Plug-in Development Kit with full integration.
  • Hardware you can trust.

Easy Analysis

With many traditional analyzers and most PC based analyzers, it is cumbersome to analyze the data even when only a few screens are captured. With DigiView, navigation and analyzing the data is much easier even when millions of screens are available in a single capture.
Digiview Navigation Features
  • Features that Enhance Analysis:
    • Use DigiView's powerful sequential searching, "Drag & Snap" markers, built-in Protocol parsers, Auto Searching, Link Groups and flexible user interface for highly productive data analysis.
    • See two waveform views of the same data. Get a 'Forest & Trees' view by 'LINKING' the views to share a common center time but allow separate zoom levels.
    • Compare different points in the capture by 'UNLINKING' the views, allowing independent zoom and center times.
    • Use the Measurement window for fast statistics on the active marker and signals, measurements between markers and signal transition counts.

Capture & Compression

  • Captured data is compressed in real-time with dedicated hardware that auto-selects from multiple techniques on-the-fly. The buffer is then transferred to the PC for analysis and storage, but is never fully de-compressed.
    • Long Capture Times - Our logic analyers have deep memory & Real-time, hardware based compression which combine to allow maximum capture times, regardless of signal activity. Achieve high resolution and long capture times at the same time, eliminating resolution vs. time trade-offs.
    • Capture History - When full Captures are transferred from the Hardware to the PC, they are stored on the Hard Drive as a history buffer and maintained according to the settings configured in the Acquisition Options.
To illustrate the effect of DigiView's compression and also present it in a manner that is more relevant to real-world usage, we have calculated several typical performance benchmarks for each DigiView Model and sampling mode. You may actually see better performance ratings than the conservative estimates displayed in the table below.

Note: These estimates apply to the Logic Analyzer's hardware storage of a single capture.
  DV3109 DV3209 DV3409 DV3100 DV3200 DV3400

Sample Depth     ( SR: Sample Rate,    DR: Data Rate,    Q: Quadrillion or 10^15 )
    Theoretical Min
    (SR = DR)
512K x 9 512K x 9 1M x 9 512K x 18
512K x 9
512K x 18
1M x 9
512K x 36
1M x 18
    Practical Min
    (SR = 4 x DR)
1M x Channel width
    @ DR = 25Mbps (40ns) 1M x 9 2M x 9 4M x 9 1M x 18
2M x 9
2M x 18
4M x 9
2M x 36
4M x 18
    @ DR = 10Mbps (100ns) 2.5M x 9 5M x 9 10M x 9 2.5M x 18
5M x 9
5M x 18
10M x 9
5M x 36
10M x 18
    @ DR = 100Kbps (10us) 250M x 9 500M x 9 1B x 9 250M x 18
500M x 9
500M x 18
1B x 9
500M x 36
1B x 18
    @ DR = 10Kbps (100us) 2.5B x 9 5B x 9 10B x 9 2.5B x 18
5B x 9
5B x 18
10B x 9
5B x 36
10B x 18
    Theoretical Max
    (DR approaches 0)
    (Quadrillion)
3Q @ 10ns
(347 days)
3Q @ 5ns
(173 days)
6Q @ 2.5ns
(173 days)
3Q @ 10ns
(347 days)
3Q @ 5ns
(173 days)
3Q @ 5ns
6Q @ 2.5ns
(173 days)
4.5Q @ 5ns
9Q @ 2.5ns
(260 days)

Typical Captures @ Full Resolution    ( data type / count stored in hardware buffer )
  DV3109 DV3209 DV3409 DV3100 DV3200 DV3400
    0.1Hz clocks 87,000 131,000
    1KHz clocks 87,000 131,000
    5KHz clocks 131,000
    25MHz clocks 131,000
    Async characters 47,000
    I²C characters 10,000
    Sync characters 12,000
    8051 Bus cycles 40,000

Easy Configuration

Easy Configuration
Define a Signal, Define a Trigger and Click on RUN. Its that simple to get started.


Define a Signal, Define a Trigger and Click on RUN. Its that simple to get going.

Defining signals is easy. Select the signal type (Bus, Bool, I2C, custom, etc), then choose the physical channels when the editor appears. The option editor shares a similar look and flow regardless of the signal type or custom plug-in.

When defining the trigger event you will discover how quickly a very complex trigger condition can be represented using our unique graphical trigger editor.

Easy Trigger Configuration
The DigiView software is designed to make configuration an easy task and less time consuming than most PC based analyzer systems. The easier it is configure and understand your Capture and Analysis tool, the easier it will be to achieve successful results.

Automation with the DigiView™ Logic Analyzer

DigiView Automation Selections
Capture data contiuously, unattended and return to find only the captures that contain conditions you are looking for.


Our DigiView Logic Analyzer has unique Automation features that can be controlled by the results of an Automatic Search or the decision of a custom Plug-in:
  • Automatically Halt the analyzer.
  • Automatically Re-arm the analyzer.
  • Automatically Save the Captured data to a storage device.
  • Automatically Discard the Captured data.
  • Capture data contiuously, unattended and return to find only the captures that contain conditions you are looking for.
Additionally, our software can automatically search the entire  Capture History storage and reload the capture containing the specified matches.

Have a very rare, elusive problem that can't be caught with a typical trigger setup or a typical logic analyzer? Use DigiView's Automation to help catch it in the act.

Analyzer Hardware you can trust

No matter how careful you are with a logic analyzer, static zaps (ESD) are inevitable.
For this reason, we engineered DigiView with extra ESD protection on everything that connects to the outside world:
  • ESD protected Channels.
  • ESD protected USB lines.
  • ESD protected Power lines.
  • DigiView is designed with a level of engineering only found in professional logic analyzers
    • Ground Current Protected - Ever melt a lead by accidentally connecting it to a power rail? You won't with DigiView. Its ground leads are protected to +-12V with auto-resetting protection circuits.
    • Voltage Protection - You also will not harm DigiView by connecting the Analyzer's channels to the wrong voltage level. All of DigiView's channels are protected from overvoltage and reverse voltages (protection levels are model specific).
    • Any Power Sequence - Ever have to be especially carefull to power everything in a specific sequence? With the DigiView Logic Analyzer you have an unrestricted power sequence. Whether its the PC, Device Under Test or the analyzer itself; any of these can be powered-up or powered-down without fear of accidentally causing damage.
    • Sample Rate Independence - DigiView's hardware performance is not dependant on the PC load, speed or memory. True "store and forward" architecture guarantees full bandwidth capturing at full sample rate under all conditions.
    • Probe leads are built with the best materials: ultra-flexible 66 strand wire for ease of use and durability; .098 square housings for side and end stacking on .1 centers while providing stress relief to the wires; fully connectorized for easy replacement or leaving leads attached to a target.

DigiView Software

DigiView Software
Free Lifetime Software Updates!
Download Capture & Analysis Software DigiView Download Link
Download Plug-in Developers Kit PDK Download Link

Signal Decoders / Protocol Analyzers

Decoder & Protocol Overview

Whether using one of our built-in protocol decoders or one created from our PDK, decoded signals are fully integrated to benefit from all features of our analysis software including Searching, Auto Searching and Exporting. Our Signal Decoders allow unique methods of interpreting and displaying the raw data captured on the logic channels.
Integrated and Synchronized

  • Each Decoder type has a unique editor where you will assign the physical logic channels and select from custom options
    • This method of abstraction allows the same channel to be assigned to multiple decoders if desired.
    • User Options defined by a Custom Plug-in are also displayed in its editor.
  • Low level bit timing and protocol field timing is shown in the Waveform View in context with other timing signals
    • The decoded protocol is also shown in a List View in frame or field modes.
    • Both views can be synchronized so that clicks or scrolling in either view is reflected in both.

Boolean

The Bool decoder does not interpret the data at all. Raw 0s and 1s are shown as received. However, it provides a level of abstraction like all other signals, allowing one to reassign which CHANNEL is assigned to this specific SIGNAL. This allows all triggers and searches to be specified in terms of the SIGNAL; not which channel(s) are being used by the signal. For example, you could specify 'Trigger on Addr=0x55 and Falling Edge of OE'.
Boolean Decode Example
Boolean Trigger Example

BUS Decoder

The BUS decoder allows you to view a collection of channels as a single BUS value, displayed in HEX, Decimal, ASCII, Octal or Binary. The channels do not need to be consecutive. We abstract a single value from only the selected channels.
BUS Decode Example

  • Benefits of a Bus Decoder and Abstraction:
    • Abstraction allows you to view the data and reference values in terms of BUS values, rather than specific channel levels.
    • Searches, Hardware Trigger's and Exporting are simplified. With abstraction a Bus value can be specified for non-consecutive channels instead of individual bit values which would require additional 'ignore bit' specifiers.
    • Search and Trigger definitions do not have to be modified when changing channel assignments.
    • Data can be viewed as a single value or expanded into consecutive bits in Waveform and Tabular views.

CAN BUS Decoder

CAN stands for Controller Area Network. It was originally developed by Robert Bosch GmbH as a reliable, fault-tolerant communications bus for automotive systems. It is used extensively in modern vehicles. Due to its robust noise immunity and low cost, it is used in industrial automation as well.
Can Decode Example
  • We decode the entire CAN 2.0B specification, including:
    • Base and Extended Frame formats
    • Data Frames
    • Remote Frames
    • Overload Frames
    • Error Frames
  • Configuration options include:
    • Baud rate
    • Propagation Delay
    • Maximum sync adjust
    • Glitch Filtering
    • Show/Hide Control bits
    • Show/Hide Delimiters
    • Show/Hide CRC
Official Spec: can2spec.pdf
Protocol Description: Wikipedia

I2C Decoder

I2C stands for Inter-IC-Communications bus. It is a 2 wire synchronous serial bus standard, originally designed for on-board communications between ICs. It has been used for some off-board applications as well (like interacting with your Computer Monitor). It was designed by Phillips Semiconductors (now NXP.)
I2C Decode Example
  • We fully support the I2C specification:
    • Standard, Fast, Fast+, High-speed and Ultra Fast Modes
    • 7bit and 10bit addressing
    • START bytes
    • Repeated START
    • General calls
    • Reserved addresses
  • Configuration options include:
    • Glitch Filter (0 - 50ns)
    • 7 Bit Address Decode as 7bit + R/W
    • 7 Bit Address Decode as raw 8bit
    • Invert Clock (SCL), Data (SDA) or Both
Official Spec: UM10204.pdf
Protocol Description: Wikipedia

SPI Decoder

SPI is a 4 wire, synchronous serial protocol. There is no official SPI specification but it has become a de facto standard. Its low cost implementation (essentially 2 shift registers) contributed to wide spread adoption and inclusion in most microcontrollers and a wide variety of peripheral ICs.
SPI Decode Example

We decode all 4 clock modes and support word widths from 2 to 24 bits

  • Configuration options include:
    • Field Length (2-24 bits)
    • Frame Length (# of Fields)
    • MOSI Clock on Rising/Falling Edge
    • MISO Clock on Rising/Falling Edge
    • Invert MISO, MOSI or Both
    • SS Active Level Low/High
    • Option to Frame on SS
    • Optional Field Idle Timeout Specifier
    • Optional Frame Idle Timeout Specifier

Protocol Description: Wikipedia

Synchronous Decoder

Synchronous is not really a protocol but rather a concept upon which many protocols are built.

Our SYNC decode is very versatile and can be configured to support a wide variation of SYNC implementations. It can also be used as a basis for custom plug-ins to support unusual configurations.
Sync Decode Example
  • Configuration options include:
    • Clock on Rising/Falling/Both Edges
    • Select Level High/Low
    • Specify Field Length
    • Specify Frame Length (# of Fields)
    • Optional Field Timeout Specifier
    • Optional Frame Timeout Specifier
    • LSB First/Last
    • Ignore Select, Frame or Field Sync
  • Frame and Field Sync Options:
    • Sync on Rising Edge
    • Sync on Falling Edge
    • Sync on Rising or Falling Edge
    • Sync on Rising Edge and End on Falling Edge
    • Sync on Falling Edge and End on Rising Edge

ASYNC (UART) Decoder

RS-232, Serial and ASYNC are often (incorrectly) used interchangeably to refer to the serial interface on microcontrollers and older PCs. The actual data encoding is defined by the UART in these devices (which are primarily connected to an RS-232 interface.) A UART decoder would be a better description but would probably not be recognized by many.
Async Decode Example


Our 'ASYNC' decoder decodes the protocol implemented by UARTs. It supports all standard baud rates and custom baud rates to 10Mbaud.

  • Configuration options include:
    • MSB First/Last
    • Character widths of 4-8 bits
    • Parity of Odd, Even, None, 0 or 1
    • 9th bit high/low addressing modes
    • Frame on 9bit Address flag
    • Frame Length Specifier (# of Characters)
    • Glitch Filtering (0-10% of Bit Width)
    • Framing, Parity and Break errors are detected
UART Overview: Wikipedia

I2S Decoder

I2S stands for Inter-IC Sound bus. It is a 3 wire synchronous serial protocol developed by Phillips Semiconductors to facilitate transferring digital stereo audio between ICs.
I2S Decode Example


We fully implement the most recent specification (June 5, 1996)

  • Configuration options include:
    • Select Word Length from 4 to 32 bits
    • Convert Data to Unsigned
    • Invert Clock
    • Invert Data
    • Invert WS

Phillips Semiconductors is now called NXP and does not appear to host the original specification. However, it can still be found at: I2SBUS.pdf

Protocol Description: Wikipedia

STATE Decoder

Our state decoder extracts clocked data from a bus so that you can focus on specific state changes, ignoring bus changes between state clocks.
State Decode Example

  • Configuration options include:
    • Clock on rising, falling or DDR clock edges
    • Supports Enable and Frame Sync Signals
    • Enable on High or Low Edge
    • Ignore Enable and Frame Sync
    • Invert Data Channels
    • Frame Length Specifier (# of States)
    • Framing Timeout Specifier (or Ignore)
  • Frame Sync Options:
    • Sync on Rising Edge
    • Sync on Falling Edge
    • Sync on Rising or Falling Edge
    • Sync on Rising Edge and End on Falling Edge
    • Sync on Falling Edge and End on Rising Edge

Plug-ins

Plug-ins are fully integrated into the DigiView applications. Signals based on plug-ins can be searched, exported and printed in the same manner as built-in types. All snaps, scrolls, lists, waveform views, searches, auto-searches, etc work in exactly the same way as our built-in decoders. In fact, the internal protocol interpreters use the same framework as the plug-ins, ensuring equal functionality.
Digiview example Plug-In as seen in Visual Studio
PDK example Plug-ins as seen in Microsoft Visual Studio express
  • Plug-ins allow the user to modify the formatting of DigiView's built in decoders, implement entirely new custom protocols and/or control the run-time behavior of the application.
  • DigiView supports 3 types of plug-ins:
    • Mini Plug-Ins - Based on one of the built-in decoders as a pre-parser, simplifying your work.
    • Full Plug-Ins - Based on the RAW data pre-processor and is responsible for all low level interpretations of the signal changes.
    • Hybrid Plug-Ins - Based on one of the built-in decoders like the Mini Plug-in, but allows additional channel selections that the Plug-in is responsible for decoding.
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Channels 9 9 9 18 18 36
Sample Rate at Full Channels 100 200 400 100 200 200
Sample Rate at 1/2 Channels same same same Double Rate (200) Double Rate (400) Double Rate (400)
Sample period (ns) 10 5 2.5 10 @ 18 ch
  5 @ 9 ch
    5 @ 18 ch
2.5 @ 9 ch
    5 @ 36 ch
2.5 @ 18 ch
Real-time Compression Yes, Tri-mode (varies according to transition frequency, duration of changes and duration of constant change)
Power Source USB External
Power (Idle / Active) <.5 Watt  / < 2.5W 2.5 Watt  / < 7 Watt
Maximum voltage per Channel +-20 Volts +-50 Volts
Ground current Protection
(ground lead to +- voltage)
Yes, +-12 Volt ground variance protection with Auto Resetting fuse
Threshold Circuits 1 2
Adjustable Threshold  +0.5V to +2.8V (suitable for 0.75V to 5V logic - AGP, CCT, CMOS, GTL, GTL+, HSTL, PECL LV, SSTL, TTL)  -6V to +6V
Anti-static protection Yes..., ESD protection on everything that connects to the outside world
 
DV3109
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DV3209
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DV3409
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DV3100
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DV3200
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DV3400
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