DigiView™ Logic Analyzer Compression Specifications

DigiView™ Hardware Compression Explained


We want two conflicting features in a logic analyzer:

  • High sample Rate (high resolution)
  • High sample Count (a lot of data/time)
Ideally, we would like to have high sample rates AND high sample counts to capture a long time-span with high resolution. However, in a typical Analyzer, it would take gigabytes of Analyzer memory to achieve both if your data transitions are fairly sparse (microsecond or more gaps).



DigiView, unlike other logic analyzers, acheives both goals by utilizing intelligent hardware memory compression techniques. A large hardware buffer alone can not reach these goals and would be cost prohibitive.

DigiView uses multiple real-time, hardware based compression techniques to compact the captured data. This has a much greater impact than increasing the buffer depth.

The data captured in logic analyzer applications is often stable for multiple sample periods (particularly at higher sample rates), making the simpliest compression technique (Transistional) the most effective. DigiView has utilized this technique since the early design stages of model DV1-100 in 2000. Later models added additional compression techniques to further minimize storage while capturing bursts of data or semi-bursting data (Tri-mode).

Having multiple techniques decided intelligently in real time, coupled with fast sample times and a very long run-length limit, makes our compression very applicable in real-world applications.
To illustrate the effect of DigiView's compression and also present it in a manner that is more relevant to real-world usage, we have calculated several typical performance benchmarks for each DigiView Model and sampling mode.

You may actually see better performance ratings than the conservative estimates displayed in the table below.
 
  DV3109 DV3209 DV3409 DV3100 DV3200 DV3500

Sample Depth     ( SR: Sample Rate,    DR: Data Rate,    Q: Quadrillion or 10^15 )
    Theoretical Min
    (SR = DR)
512K x 9 512K x 9 1M x 9 512K x 18
512K x 9
512K x 18
1M x 9
1M x 36
2M x 18
    Practical Min
    (SR = 4 x DR)
1M x Channel width 2M x Channel width
    @ DR = 25Mbps (40ns) 1M x 9 2M x 9 4M x 9 1M x 18
2M x 9
2M x 18
4M x 9
4M x 36
8M x 18
    @ DR = 10Mbps (100ns) 2.5M x 9 5M x 9 10M x 9 2.5M x 18
5M x 9
5M x 18
10M x 9
10M x 36
20M x 18
    @ DR = 100Kbps (10us) 250M x 9 500M x 9 1B x 9 250M x 18
500M x 9
500M x 18
1B x 9
1B x 36
2B x 18
    @ DR = 10Kbps (100us) 2.5B x 9 5B x 9 10B x 9 2.5B x 18
5B x 9
5B x 18
10B x 9
10B x 36
20B x 18
    Theoretical Max
    (DR approaches 0)
    (Quadrillion)
3Q @ 10ns
(347 days)
3Q @ 5ns
(173 days)
6Q @ 2.5ns
(173 days)
3Q @ 10ns
(347 days)
3Q @ 5ns
(173 days)
3Q @ 5ns
6Q @ 2.5ns
(173 days)
9Q @ 4ns
18Q @ 2ns
(520 days)

Typical Captures @ Full Resolution    ( data type / count stored in hardware buffer )
    0.1Hz clocks 87,000 262,000
    1KHz clocks 87,000 262,000
    5KHz clocks 131,000 262,000
    25MHz clocks 131,000 262,000
    Async characters 47,000 94,000
    I²C characters 10,000 20,000
    Sync characters 12,000 24,000
    8051 Bus cycles 40,000 80,000


Compare Hardware Specifications...   more info...


Final note:

The data is compressed in real-time with dedicated hardware and is NEVER fully de-compressed (which could result in data files much larger the available hard-drive capacities). DigiView software transfers the entire compressed data buffer from the hardware to internal PC memory in compressed form. This allows us to transfer the entire buffer in a fraction of a second. The waveform display routines fetch only enough data from the compressed buffer to fill the viewable portion of the display screen and even that is compressed.